Google Taps AMD for Next-Gen TPU: Hybrid AI Chip with On-Package CPUs Emerges

Context mode is active. Hover over any highlighted term to see its definition. Click a nested term to go deeper.
Google is reportedly shaking up its long-standing AI chip strategy by partnering with AMD to design a next-generation Tensor Processing Unit, or TPU, specifically the upcoming v10 generation. This marks AMD first significant foray into custom AI Application-Specific Integrated Circuit (ASIC) projects and suggests Google is pushing for a hybrid AI ASIC integrating on-package CPU cores, likely targeting demanding reinforcement learning workloads. The move could signal a strategic diversification from its traditional TPU designer, Broadcom, amidst growing demand for specialized AI hardware. This collaboration comes as the AI hardware landscape heats up, with major cloud providers intensely focused on developing bespoke silicon to power their immense AI operations. Google recently rolled out its 8th generation TPU (8t and 8i) designed by Broadcom and MediaTek, hosted on its own ARM-based Axion CPUs, showcasing a clear trend towards highly optimized, multi-accelerator environments. The rumored AMD partnership highlights the increasing importance of advanced packaging technologies like AMD System-on-Integrated-Chips (SoIC) and the need for tight integration between specialized AI accelerators and general-purpose CPU cores to handle complex tasks like reinforcement learning more efficiently. Reports indicate Broadcom has faced challenges in ramping up CoWoS-S capacity, leading to reduced TPU output in the latter half of 2026, which could be another factor driving Google diversification. Looking ahead, this alliance could give AMD a crucial foothold in the burgeoning custom silicon market for large cloud providers, an area where Broadcom has traditionally held a strong position. For Google, working with AMD potentially offers greater design diversity, improved bargaining power with suppliers, and the ability to craft highly tailored architectures that can specifically address its evolving and increasingly demanding AI workload mix, particularly in areas requiring integrated CPU intelligence. This strategic pivot underscores a broader industry shift towards more specialized and tightly integrated AI solutions as companies push the boundaries of artificial intelligence.